Vector Floating-Point Instructions

vfadd

Floating-point add.

vfadd.vv vd, vs2, vs1, vm
vfadd.vf vd, vs2, rs1, vm

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25

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11-7

6-0

000000

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

000000

vm

vs2

rs1

101

vd

1010111

vfsub

Floating-point subtract.

vfsub.vv vd, vs2, vs1, vm
vfsub.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

000010

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

000010

vm

vs2

rs1

101

vd

1010111

vfmin

Floating-point minimum.

vfmin.vv vd, vs2, vs1, vm
vfmin.vf vd, vs2, rs1, vm

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25

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11-7

6-0

000100

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

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14-12

11-7

6-0

000100

vm

vs2

rs1

101

vd

1010111

vfmax

Floating-point maximum.

vfmax.vv vd, vs2, vs1, vm
vfmax.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

000110

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

000110

vm

vs2

rs1

101

vd

1010111

vfsgnj

Produces a result that takes all bits except the sign bit from vs1/rs1. The result’s sign bit is vs2’s sign bit.

vfsgnj.vv vd, vs2, vs1, vm
vfsgnj.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

001000

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

001000

vm

vs2

rs1

101

vd

1010111

vfsgnjn

Produces a result that takes all bits except the sign bit from vs1/rs1. The result’s sign bit is opposite of vs2’s sign bit.

vfsgnjn.vv vd, vs2, vs1, vm
vfsgnjn.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

001001

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

001001

vm

vs2

rs1

101

vd

1010111

vfsgnjx

Produces a result that takes all bits except the sign bit from vs1/rs1. The result’s sign bit is XOR of vs2’s sign bit.

vfsgnjx.vv vd, vs2, vs1, vm
vfsgnjx.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

001010

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

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14-12

11-7

6-0

001010

vm

vs2

rs1

101

vd

1010111

vfcvt

Conversion operations to convert to and from floating-point values and unsigned and signed integers, where both source and destination are SEW wide.

vfcvt.xu.f.v vd, vs2, vm # Convert float to unsigned integer, with vs1 = '00000'.
vfcvt.x.f.v vd, vs2, vm # Convert float to signed integer, with vs1 = '00001'.
vfcvt.rtz.xu.f.v vd, vs2, vm # Convert float to unsigned integer, truncating, with vs1 = '00110'.
vfcvt.rtz.x.f.v vd, vs2, vm # Convert float to signed integer, truncating, with vs1 = '00111'.
vfcvt.f.xu.v vd, vs2, vm # Convert unsigned integer to float, with vs1 = '00010'.
vfcvt.f.x.v vd, vs2, vm # Convert signed integer to float, with vs1 = '00011'.

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25

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6-0

010010

vm

vs2

vs1

001

vd/rd

1010111

vfwcvt

Conversion instructions to convert between narrower integer and floating-point datatypes to a type of twice the width.

vfwcvt.xu.f.v vd, vs2, vm # Convert float to double-width unsigned integer, with vs1 = '01000'.
vfwcvt.x.f.v vd, vs2, vm # Convert float to double-width signed integer, with vs1 = '01001.
vfwcvt.rtz.xu.f.v vd, vs2, vm # Convert float to double-width unsigned integer, truncating, with vs1 = '01110.
vfwcvt.rtz.x.f.v vd, vs2, vm # Convert float to double-width signed integer, truncating, with vs1 = '01111.
vfwcvt.f.xu.v vd, vs2, vm # Convert unsigned integer to double-width float, with vs1 = '01010.
vfwcvt.f.x.v vd, vs2, vm # Convert signed integer to double-width float, with vs1 = '01011.
vfwcvt.f.f.v vd, vs2, vm # Convert single-width float to double-width float, with vs1 = '01100.

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25

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6-0

010010

vm

vs2

vs1

001

vd/rd

1010111

vfncvt

Conversion instructions to convert wider integer and floating-point datatypes to a type of half the width.

vfncvt.xu.f.w vd, vs2, vm # Convert double-width float to unsigned integer, with vs1 = '10000'.
vfncvt.x.f.w vd, vs2, vm # Convert double-width float to signed integer, with vs1 = '10001'.
vfncvt.rtz.xu.f.w vd, vs2, vm # Convert double-width float to unsigned integer, truncating, with vs1 = '10110'.
vfncvt.rtz.x.f.w vd, vs2, vm # Convert double-width float to signed integer, truncating, with vs1 = '10111'.
vfncvt.f.xu.w vd, vs2, vm # Convert double-width unsigned integer to float, with vs1 = '10010'.
vfncvt.f.x.w vd, vs2, vm # Convert double-width signed integer to float, with vs1 = '10011'.
vfncvt.f.f.w vd, vs2, vm # Conver double-width float to single-width float, with vs1 = '10100'.
vfncvt.rod.f.f.w vd, vs2, vm # Convert double-width float to single-width float, with vs1 = '10101'.
# rounding towards odd.

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25

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6-0

010010

vm

vs2

vs1

001

vd/rd

1010111

vfsqrt

Floating-point square root.

vfsqrt.v vd, vs2, vm

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25

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6-0

010011

vm

vs2

00000

001

vd/rd

1010111

vfrsqrt7

Floating-point reciprocal square-root estimate to 7 bits.

vfrsqrt7.v vd, vs2, vm

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25

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6-0

010011

vm

vs2

00100

001

vd/rd

1010111

vfrec7

Floating-point reciprocal estimate to 7 bits.

vfrec7.v vd, vs2, vm

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25

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6-0

010011

vm

vs2

00101

001

vd/rd

1010111

vfclass

Examines the value in vs1 and writes to vd a 10-bit mask that indicates the class of the floating-point number.

vfclass.v vd, vs2, vm

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25

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6-0

010011

vm

vs2

10000

001

vd/rd

1010111

vmfeq

Floating-point compare instruction to set bit if equal.

vmfeq.vv vd, vs2, vs1, vm
vmfeq.vf vd, vs2, rs1, vm

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25

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6-0

011000

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

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14-12

11-7

6-0

011000

vm

vs2

rs1

101

vd

1010111

vmfle

Floating-point compare instruction to set bit if less than or equal.

vmfle.vv vd, vs2, vs1, vm
vmfle.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

011001

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

011001

vm

vs2

rs1

101

vd

1010111

vmflt

Floating-point compare instruction to set bit if less than.

vmflt.vv vd, vs2, vs1, vm
vmflt.vf vd, vs2, rs1, vm

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25

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11-7

6-0

011011

vm

vs2

vs1

001

vd/rd

1010111

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25

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14-12

11-7

6-0

011011

vm

vs2

rs1

101

vd

1010111

vmfne

Floating-point compare instruction to set bit if not equal.

vmfne.vv vd, vs2, vs1, vm
vmfne.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

011100

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

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14-12

11-7

6-0

011100

vm

vs2

rs1

101

vd

1010111

vmfgt

Floating-point compare instruction to set bit if greater than.

vmfgt.vf vd, vs2, rs1, vm

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25

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11-7

6-0

011101

vm

vs2

rs1

101

vd

1010111

vmfge

Floating-point compare instruction to set bit if greater than or equal.

vmfge.vf vd, vs2, rs1, vm

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25

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6-0

011111

vm

vs2

rs1

101

vd

1010111

vfdiv

Floating-point divide.

vfdiv.vv vd, vs2, vs1, vm
vfdiv.vf vd, vs2, rs1, vm

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25

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6-0

100000

vm

vs2

vs1

001

vd/rd

1010111

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25

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11-7

6-0

100000

vm

vs2

rs1

101

vd

1010111

vfrdiv

Reverse floating-point divide vector = scalar / vector.

vfrdiv.vf vd, vs2, rs1, vm

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25

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6-0

100001

vm

vs2

rs1

101

vd

1010111

vfmul

Floating-point multiply.

vfmul.vv vd, vs2, vs1, vm
vfmul.vf vd, vs2, rs1, vm

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25

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14-12

11-7

6-0

100100

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

100100

vm

vs2

rs1

101

vd

1010111

vfrsub

Floating-point reverse subtract, vd[i] = f[rs1] - vs2[i]

vfrsub.vf vd, vs2, rs1, vm

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25

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6-0

100111

vm

vs2

rs1

101

vd

1010111

vfmadd

FP multiply-add, overwrites multiplicand.

vfmadd.vv vd, vs2, vs1, vm
vfmadd.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

101000

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

101000

vm

vs2

rs1

101

vd

1010111

vfnmadd

FP negate-(multiply-add), overwrites multiplicand.

vfnmadd.vv vd, vs2, vs1, vm
vfnmadd.vf vd, vs2, rs1, vm

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25

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11-7

6-0

101001

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

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14-12

11-7

6-0

101001

vm

vs2

rs1

101

vd

1010111

vfmsub

FP multiply-sub, overwrites multiplicand.

vfmsub.vv vd, vs2, vs1, vm
vfmsub.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

101010

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

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14-12

11-7

6-0

101010

vm

vs2

rs1

101

vd

1010111

vfnmsub

FP negate-(multiply-sub), overwrites multiplicand.

vfnmsub.vv vd, vs2, vs1, vm
vfnmsub.vf vd, vs2, rs1, vm

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25

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11-7

6-0

101011

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

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14-12

11-7

6-0

101011

vm

vs2

rs1

101

vd

1010111

vfmacc

FP multiply-accumulate, overwrites addend.

vfmacc.vv vd, vs2, vs1, vm
vfmacc.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

101100

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

101100

vm

vs2

rs1

101

vd

1010111

vfnmacc

FP negate-(multiply-accumulate), overwrites subtrahend.

vfnmacc.vv vd, vs2, vs1, vm
vfnmacc.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

101101

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

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14-12

11-7

6-0

101101

vm

vs2

rs1

101

vd

1010111

vfmsac

FP multiply-subtract-accumulator, overwrites subtrahend.

vfmsac.vv vd, vs2, vs1, vm
vfmsac.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

101110

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

101110

vm

vs2

rs1

101

vd

1010111

vfnmsac

FP negate-(multiply-subtract-accumulator), overwrites minuend.

vfnmsac.vv vd, vs2, vs1, vm
vfnmsac.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

101111

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

101111

vm

vs2

rs1

101

vd

1010111

vfwadd

Widening FP add, 2*SEW = SEW + SEW.

vfwadd.vv vd, vs2, vs1, vm
vfwadd.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

110000

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

110000

vm

vs2

rs1

101

vd

1010111

vfwsub

Widening FP subtract, 2*SEW = SEW - SEW.

vfwsub.vv vd, vs2, vs1, vm
vfwsub.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

110010

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

110010

vm

vs2

rs1

101

vd

1010111

vfwadd.w

Widening FP add, 2*SEW = 2*SEW + SEW.

vfwadd.wv vd, vs2, vs1, vm
vfwadd.wf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

110100

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

110100

vm

vs2

rs1

101

vd

1010111

vfwsub.w

Widening FP subtract, 2*SEW = 2*SEW - SEW.

vfwsub.wv vd, vs2, vs1, vm
vfwsub.wf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

110110

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

110110

vm

vs2

rs1

101

vd

1010111

vfwmul

Widening floating-point multiply.

vfwmul.vv vd, vs2, vs1, vm
vfwmul.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

111000

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

111000

vm

vs2

rs1

101

vd

1010111

vfwmacc

FP widening multiply-accumulate, overwrites addend.

vfwmacc.vv vd, vs2, vs1, vm
vfwmacc.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

111100

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

111100

vm

vs2

rs1

101

vd

1010111

vfwnmacc

FP widening negate-(multiply-accumulate), overwrites addend.

vfwnmacc.vv vd, vs2, vs1, vm
vfwnmacc.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

111101

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

111101

vm

vs2

rs1

101

vd

1010111

vfwmsac

FP widening multiply-subtract-accumulator, overwrites addend.

vfwmsac.vv vd, vs2, vs1, vm
vfwmsac.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

111110

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

19-15

14-12

11-7

6-0

111110

vm

vs2

rs1

101

vd

1010111

vfwnmsac

FP widening negate-(multiply-subtract-accumulator), overwrites addend.

vfwnmsac.vv vd, vs2, vs1, vm
vfwnmsac.vf vd, vs2, rs1, vm

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25

24-20

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14-12

11-7

6-0

111111

vm

vs2

vs1

001

vd/rd

1010111

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25

24-20

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14-12

11-7

6-0

111111

vm

vs2

rs1

101

vd

1010111